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Validation engineers are said to have a 'break-the-part' mentality. This means they spend some of their time working to identify the use-cases in which the device will stop working as intended and understand the impact and cause of those failures. Sometimes, those are acceptable failures, but others we may need to mitigate for quality, safety, or other reasons. Plus, we want to ensure that our parts are consistently performing to the specifications that we set in our TRM and data sheet, and even to some more conservative limits or as defined in the VVCM (validation/verification compliance matrix).
Candidate should also have knowledge of HDL and be hands-on with Palladium to execute the tests and debug along with having automation mindset. Validation engineers will also design, develop, and implement necessary methods of measuring device performance and troubleshooting any related systems, equipment or device issues that arise. Validation engineers are often working in a post-silicon lab or on the software programs required to run their measurements.
Expected knowledge on : Device boot, Arm-Cortex-M0P, communication peripherals (I2C/SPI/UART) and IDE (CCS/IAR). Knowledge on FPGA builds and Microcontroller