- USA (On-Site) | California Preferred
- Full Time Permanent Contract
- Salary: $220,000 to $280,000 (DOE)
- Total Comp: Equity, Bonus, Medical, Dental, Vision, 401(k), Commuter Benefits, Parental Leave, Child Care Support
A pioneering AI hardware company headquartered in California is redefining what is possible at the intelligent edge. Built around novel compute architecture principles and advanced model efficiency techniques, they have developed a tightly integrated hardware and software platform that delivers high-performance AI inference at a fraction of the cost and energy of traditional approaches. Their technology powers a broad spectrum of intelligent devices, from wearables and household appliances through to robotics and autonomous vehicles.
They are looking to expand their compiler team with a Senior ML Compiler Engineer who will own critical components of the ML compilation and optimisation pipeline, with their work directly determining whether neural network models fit within hardware constraints and achieve real time performance on a custom AI accelerator.
Key Responsibilities:
- Designing and implementing core compiler architecture including IR design, transformation pipelines, and hardware aware optimisation strategies for scheduling, tiling, and memory reuse
- Leading development of complex compiler passes such as global memory allocation, liveness-driven reuse, cross-operator fusion, and graph partitioning
- Developing cost models and optimisation heuristics that accurately reflect hardware execution behaviour
- Exploring and applying advanced constraint-based optimisation techniques including ILP, MILP, and constraint programming
- Diagnosing and resolving system-level issues spanning model correctness, performance regressions, and hardware behaviour mismatches
- Collaborating closely with hardware engineering teams on the co-design of compiler abstractions and execution models
- Contributing to the long-term architecture and quality of a production-grade compiler infrastructure
Ideal Profile:
- 4 or more years of experience in compiler engineering, systems programming, or performance engineering
- Masters or PhD in Computer Science, Electrical Engineering, Mathematics, or a related field
- Deep hands-on experience with ML compiler frameworks (MLIR, TVM, XLA, or equivalent) or low-level optimisation techniques (scheduling, memory management, tiling)
- Demonstrated ability to design and build non-trivial compiler systems or passes independently
- Strong intuition for performance trade-offs across compute, memory bandwidth, and data movement
- Comfort reasoning about and working within tight hardware constraints
- Experience with constraint solvers (MILP, ILP, CP) is a strong plus
- Background in AI accelerator architectures, embedded systems, or DSP is advantageous
This is a rare opportunity to join a high-impact compiler team at a well-funded AI hardware company, working on technology that directly shapes the performance and efficiency of next-generation intelligent devices at the edge.
APPLY NOW to discuss further details.
5V Tech are acting as an Employment Agency for the purposes of this position. We offer a reward scheme if you can recommend someone for this role: $250 for you and $250 to a charity of your choice. 5V Tech are recognised talent solutions experts within IoT and Deep Tech, working across Europe, the UK, and North America.
