Eximietas Design is a leading technology consulting and solutions development firm specialising in the VLSI, Cloud Computing, Cyber Security, and AI/ML domains. Our success is anchored in the unparalleled expertise of our engineering leadership team, whose collective experience spans renowned tech giants. With a commitment to innovation and excellence, we deliver cutting-edge solutions that empower businesses to thrive in the ever-evolving digital landscape.
Location: Bay Area, CA
Employment Type: Full-Time
Minimum Qualifications:
● Bachelor’s degree in computer science or electrical/Electronics Engineering
● Over 10 years of experience in Design Verification
● Strong understanding of design concepts and ASIC verification flow
● Proven experience in IP, Subsystem, and SoC verification
● Hands-on expertise with high-speed protocols and their controllers (PCIe/USB/DDR/ Ethernet/MIPI/UFS)
● Proficient in System Verilog and UVM coding
● Solid understanding of RAL (Register Abstraction Layer)
● Practical experience integrating third-party VIPs
● Excellent problem-solving, analytical, and debugging skills
● Mandatory exposure to at least one of the following: GLS, UPF, Performance Verification, Meta stability simulation, Boot-up (C–SV/UVM) handshakes and C testcase development
● Demonstrated capability in Subsystem testbench development and SoC-level verification
● Strong knowledge of AMBA protocols including AXI, APB, and AHB
● Hands-on experience with revision control systems such as Git, SVN, or Perforce
● Experience in a team lead role with responsibilities in guiding, mentoring, and ensuring effective collaboration across teams
As a Lead verification engineer candidate will be responsible to work at IP, Subsystem or
SoC verification-related tasks.
Responsibilities:
● Develop testbench components (Driver, Monitor, Scoreboard) from scratch or enhance an existing testbench for a given IP, Subsystem, or SOC.
● Understand design specifications and implementation to define the verification strategy.
● Create testbench micro-architecture, test plan, and coverage plan documents.
● Define the verification scope, develop test plans and tests, and establish the verification infrastructure to ensure design correctness.
● Implement System Verilog assertions and functional coverage.
● Analysed code coverage and address missing scenarios to meet coverage goals.
● Work with other verification team members to develop, execute, and analyse verification test cases and sequences, providing relevant solutions to issues.
● Collaborate with architects, designers, and pre- and post-silicon verification teams to meet deadlines.
● Coordinate with customer leads, ensuring all deliverables and timelines are met.
● Serve as the project's point of contact, responsible for verification signoff.
Apply/Refer - mohini.tyagi@eximietas.design